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Seen by:Parallel computations on reconfigurable meshes
Appears in IEEE Trans. on Computers 42 (1993), pp. 678-692
3 views
Seen by:Formalization of Data Flow Computing and a Coinductive Approach to Verifying Flowware Synthesis
Phan Cong Vinh and Jonathan P. Bowen. In Marina Gavrilova and C. J. Kenneth Tan (eds.), Transactions on Computational Science I, Springer-Verlag, LNCS, Volume 4750, pages 1-36, June 2008. DOI: 10.1007/978-3-540-79299-4_1
Reconfigurable computing refers to the notions of configware and flowware. Configware means structural programming, or... more
Reconfigurable computing refers to the notions of configware and flowware. Configware means structural programming, or programming in space to execute computation in space. Flowware means data-flow programming that schedules the data flow for output from or input to the configware architecture. In this paper, data flows of a synthesized computation are formalized. This means that data flow is specified as a behavioral stream function in stream calculus, which is used to underpin the semantics for Register Transfer Level (RTL) synthesis. A stream representation allows the use of coinductive principles in stream calculus. In particular, using the coinductive proof principle, we show that behavioral stream functions in the three-stage synthesis process (scheduling, register allocation and binding, allocation and binding of functional units) are always bisimilar regardless of changes in a scheduling, allocation or binding procedure. Our formalization makes pipelining possible, in which all functional units as well as registers of hardware resources are reused during different control steps (C-steps). Moreover, a coinductive approach to verifying flowware synthesis, which is independent of the heuristic during register allocating and binding step, is proposed as a practical technique.
Keywords: Dynamic reconfiguration - Reconfigurable computing - Dynamically Programmable Gate Array (DPGA) - Flowware - Configware - Configware engineering - Embedded systems - Formal methods
Adaptive Computing In NASA Multi-Spectral Image Processing
by Mark Chang
Master's Thesis, Northwestern University
Automated Least-Significant Bit Datapath Optimization for FPGAs
by Mark Chang
published in FCCM 2004
A MATLAB Compiler for Configurable Computing Systems
by Mark Chang
Northwestern University Department of Electrical and Computer Engineering Technical Report CPDC-TR-9908-013
Precis: a Usercentric Word-Length Optimization Tool
by Mark Chang
published in IEEE Design & Test of Computers, 2005
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Seen by: and 2 moreArchitectural Development and Functional Verification of SuperSpeed USB 3.0 PHY Layer Controller
by Hasan Baig
Hasan Baig and Jeong-A Lee
Journal of Computing, NY, USA, Vol. 3, Issue 5, ISSN 2151-9617, May 2011.
Implementation and Functional Verification of Soft IP Core of USB 3.0 Device MAC Layer
by Hasan Baig
Hasan Baig and Jeong-A Lee
2011 International Conference on Embedded Systems and Applications (ESA’11) organized by The 2011 World Congress in Computer Science, Computer Engineering, and Applied Computing (WORLDCOMP’11), Las Vegas, Nevada, USA, July 18-21, 2011.
The paper acceptance rate of this conference is 24% for 2011 publications.

